Intel revises its XPU tactic

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Intel has introduced a shift in system that impacts its XPU and info-middle product roadmap.

XPU is an exertion by Intel to incorporate a number of items of silicon into a single offer. The plan was to blend CPU, GPU, networking, FPGA, and AI accelerator and use software program to opt for the most effective processor for the endeavor at hand.

That’s an bold task, and it looks like Intel is admitting that it just cannot do it, at the very least for now.

Jeff McVeigh, company vice president and standard manager of the Super Compute Group at Intel, provided an update to the data-center processor roadmap that involves taking a couple of methods back. Its proposed mixture CPU and GPU, code-named Falcon Shores, will now be a GPU chip only.

“A ton has adjusted in the past 12 months. Generative AI is reworking all the things. And from our standpoint, from Intel’s standpoint, we feel it is untimely to be integrating the CPU and GPU for the next-generation products,” McVeigh reported throughout a press briefing at the ISC Significant Functionality Meeting in Hamburg, Germany.

The previous program identified as for the CPU and GPU to be on the similar advancement cycle, but the GPU could acquire for a longer time to create than the CPU, which would have meant the CPU technologies would sit idle when the GPU was becoming created. Intel made a decision that the dynamic character of present-day sector dictates a will need for discrete alternatives.

“I’ll admit it, I was improper. We were being moving also rapid down the XPU path. We really feel that this dynamic mother nature will be superior served by having that overall flexibility at the platform level. And then we’ll integrate when the time is right,” McVeigh claimed.

The final result is a major alter in Intel’s roadmap.

Intel in March scrapped a supercomputer GPU codenamed Rialto Bridge, which was to be the successor to the Max Sequence GPU, codenamed Ponte Vecchio, which is currently on the current market.

The new Falcon Shores chip, which is the successor to Ponte Vecchio, will now be a future-technology discrete GPU specific at the two high-efficiency computing and AI. It features the AI processors, conventional Ethernet switching, HBM3 memory, and I/O at scale, and it is now thanks in 2025.

McVeigh claimed that Intel hasn’t dominated out combining a CPU and GPU, but it really is not the priority appropriate now. “We will at the suitable time … when the window of weather is appropriate, we’ll do that. We just really don’t feel like it is appropriate in this upcoming technology.”

Other Intel news

McVeigh also talked up advancements to Intel’s OneAPI toolkit, a spouse and children of compilers, libraries, and programming instruments that can execute code on the Xeon, Falcon Shores GPU, and Gaudi AI processor. Create after, and the API can decide on the most effective chip on which to execute. The most up-to-date update delivers pace gains for HPC programs with OpenMP GPU offload, prolonged guidance for OpenMP and Fortran, and accelerated AI and deep understanding.

On the supercomputer front, Intel has sent additional than 10,624 compute nodes of Xeon Max Sequence chips with HBM for the Aurora supercomputer, which contains 21,248 CPU nodes, 63,744 GPUs, 10.9PB of DDR memory, and 230PB of storage. Aurora is becoming constructed at the Lawrence Livermore Countrywide Labs and will exceed 2 exaFLOPs of effectiveness when entire. When operational, it is predicted to dethrone Frontier as the swiftest supercomputer in the world.

Intel also talked about servers from Supermicro that seem to be to be aimed at using on Nvidia’s DGX AI units. They feature eight Ponte Vecchio Max Sequence GPUs, every single with 128 GB of HBM memory for a lot more than 1 TB full of HBM memory per system. Not shockingly, the servers are qualified at AI deployments. The product or service is envisioned to be broadly offered in Q3.

Copyright © 2023 IDG Communications, Inc.

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